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The age of silicon transistors and semiconductors will be in the past
Business news December 1st, in the next few decades, chip manufacturers will not be able to produce faster silicon chips by integrating smaller transistors into a chip, because too small silicon transistors are easy to break and are very expensive.
People's research materials need to overcome many challenges if they want to surpass silicon. Now, researchers at the University of California at Berkeley have found a way to cross the barrier: they have developed a reliable way to produce fast, low power nanoscale transistors, which are used as a compound semiconductor material. Their method is simpler and certainly cheaper than the present method.
Compared to silicon, compound semiconductors have better electrical performance, which means that transistors made of it have lower energy consumption and faster speed. These materials have appeared in some expensive special applications, such as military communications equipment, which will help to improve the more promising silicon alternatives, such as graphite and carbon nanotubes.
But the chips made of compound semiconductor materials are also very fragile and expensive, "only when it is not necessary to consider the cost," said Ali Garway, an associate professor of electrical engineering and computer science at the University of California at Berkeley, for example, that compound semi conductors are sold in the market and are expensive for use. Military communication chip.
Researchers believe that they can overcome this vulnerability and high prices, just to develop compound semiconductor transistors and put them on a supportive silicon chip that can be compatible with existing chip manufacturing facilities.
However, compound semiconductors can not grow on silicon surface. The mismatch between the crystal structures of the two materials makes it difficult to do well. But the Berkeley research team has shown that transistors made from compound semiconductors can grow on another surface and then transfer to silicon. "This is a seemingly feasible way to solve the practical difficulty, that compound semiconductors are difficult to grow," said Jesus Del Alamo (Jes sdelAlamo), a professor of electrical engineering and computer science at the Massachusetts Institute of Technology.
The technology shown by Berkeley's researchers is the use of indium arsenide (indiumarsenide). They nurture this material, protecting the chip on the galliumantimonide wafer, the protective top layer, with aluminum antimony gallium. The wafer can cultivate high-quality crystalline InAs thin films. The protective layer is subsequently etched chemically, and nano sized InAs ribbons will be engraved. Researchers use rubber stamps to pick up nanobelts and put them on silicon wafers. Silicon will provide structural support for InAs. The surface of the material is coated with silicon dioxide to serve as a transistor insulator. To complete the transistor, we need to put down the metal gate (metalgates) so that the current can go in and out.
The research team of gawei described the performance of indium arsenide transistors prepared by this method, published in last week's journal Nature online. These transistors, which are about 500 nanometers long, are similar to compound semiconductor transistors. The latter uses more complex technologies, says calve. The Berkeley research group's indium arsenide transistor is much faster than the silicon transistor, and at the same time, it has lower power consumption, only 0.5 volts, and silicon needs 3.3 volts. And their transconductance (adaptability to voltage variation) is 8 times the same scale silicon transistor. "This is a very good performance," said Dmitri Antoniadis, a professor of electrical engineering at the Massachusetts Institute of Technology, "considering how these devices are made."
This process is used to make indium arsenide transistors, which are used to make a class of chips, called "Silicon insulators (SOI)" electronic products, which require a silicon chip to be placed on a wafer of another material, which can be made. For this reason, he named them insulation X (XOI: any material on insulator).
The insulated X device made by this process is wafer level, more complex than SOI, because it needs to integrate several different types of materials, and the chips are in different sizes, said Michael Maybury (MichaelMayberry), director of research and development of Intel components. "There are many forms, that is, the wrong process is going to happen." He said. Over the past three years, Intel has been working on ways to cultivate compound semiconductors, and to cultivate directly on silicon wafers. Their method is to develop a buffer layer between them. So far, they have to use a thick buffer layer, which affects the performance of the transistors, but meber says they have proved that the method is feasible.
Maybury believes that the value of the work of gawei is that it shows that the performance of indium arsenide transistor is good, and this is the case when it is reduced to nanometer size. "We don't know what the performance of these devices is," he said, the theorists had guessed, but in nanoscale, unexpected quantum effects would suddenly appear.
He plans to make smaller transistors to see if they can maintain performance. Del Alamo and Antoniadis, the Massachusetts Institute of Technology, are also trying to determine the scale of the final scaling of compound semiconductor transistors. Now two of them have produced 30 nanometers of transistors. "I hope to see how perfect these materials can be,"